Boots – shoes – and leggings
Patent
1993-10-14
1995-08-22
Envall, Jr., Roy N.
Boots, shoes, and leggings
G06F 102
Patent
active
054446457
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE PRESENT INVENTION
The present invention relates to a multi-channel pseudo random pattern generating device and, more particularly, to multiplication of the number of channels and standardization of the circuit configuration of pseudo random pattern generators in respective channels.
BACKGROUND OF THE RELATED ART
The basic circuit of a pseudo random pattern generator (hereinafter referred to simply as a RP generator as well) is made up of a shift register and at least one XOR (an exclusive OR circuit). FIG. 4 is a diagrammatic showing of its example, in which a generator polynomial (or generating function) is expressed by F(X) =X.sup.5 +X.sup.2 +1 and five D-FF (D type flip-flop) stages and one XOR are employed. As shown, for the generation of a pseudo random pattern (PRBS: Pseudo Random Binary Sequence) a feedback type shift register is used and, for example, the outputs from its final stage and any one of its intermediate stages are input into the XOR, whose output is fed back to the input of the shift register. Upon each input of one clock pulse (CK) into this circuit, PRBS data of one or more bits is produced from an arbitrary one or more shift stages.
As is well-known in the art, the pseudo random pattern generator having an n-order generator polynomial F(X) is usually formed by an n-stage shift register type circuit and PRBS data from each shift stage is a repetition of a pattern of successive 2.sup.n -1 bits. The outputs from any shift stages have patterns of the same sequence and they are displaced apart in phase alone. Hence, the output from any shift stage may be used as the PRBS data from the pseudo random pattern generator. It is also possible to use outputs from an arbitrary number of shift stages as random pattern data.
As depicted in FIG. 5, a conventional m-channel pseudo random pattern generating device is comprised of RP generators 1.sub.1 through 1.sub.m that have different generator polynomials F.sub.1 (X), F.sub.2 (X), ..., F.sub.m (X), respectively. Since the generator polynomials F.sub.i (X) (where i=1 through m) differ from one another, cross-correlation of the PRBS data in the respective channels CH.sub.i can be made low.
There is the possibility that as the number m of channels used increases (more than 100, for instance), conventional multi-channel PRBS generating devices could not be implemented because the number of existing generator polynomials F.sub.i (X) is about 100. Moreover, the RP generator in each channel is formed on the basis of a different generator polynomial, and hence has a different circuit configuration accordingly; thus, it is impossible to standardize the circuit configuration of the RP generators in the respective channels and difficult to fabricate them as IC's.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to solve the defects of the prior art and provide a multi-channel PRBS generating device which allows the number m of channels to be made larger than in the prior art and permits the use of a common circuit configuration for RP generators in respective channels.
The multi-channel PRBS generating device according to the present invention includes
pseudo random pattern generators of first to m-th (where m is an integer equal to or larger than 2) channels each formed by an n-stage shift register which is initialized and driven by a clock signal to shift from one stage to another to generate a pseudo random pattern on the basis of a common generator polynomial;
initial value generating means which generates a desired one of first to p-th (where p is an integer greater than 1) sets of initial values {I.sub.1, I.sub.2, . . . , I.sub.m }, {I.sub.m+1, I.sub.m+2, . . . , I.sub.m+m }, . . . , and {I.sub.(p-1)m+1, I.sub.(p-1)m+2, . . . , I.sub.(p-1)m+m } which are obtained by repeatedly generating m times data of n bits that are provided from n shift stages of one of the pseudo random pattern generators at time intervals z.sub.k defined by the number of clock pulses of the clock signal; and
a control part which sets
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Proceedings of the 1989 Winter Simulation Conference, Washington D.C., pp. 459-461; Fushimi: "Random number generation on parallel processors".
IEE Proceedings E. Computers & Digital Techniques, vol. 138, No. 3, May 1991, Stevenage GB, pp. 138-146, Saarinen et al "VLSI implementation of Tausworthe random number generator for parallel processing environment".
Parallel Computing, vol. 15, No. 1/3, Sep. 1990, Amsterdam NL, pp. 155-164, Deak, "Uniform random number generators for parallel computers".
Shimawaki Kazuhiro
Yoshida Tomio
Advantest Corporation
Envall Jr. Roy N.
Ngo Chuong D.
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