Method and circuit for conditioning a signal for use in systems

Coded data generation or conversion – Sample and hold

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341118, H03M 100

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active

054185335

ABSTRACT:
A method and circuit for conditioning a received analog signal for input to an analog-to-digital converter circuit ("ADC"). For each clock period in which a conversion is triggered, a first analog value is provided during a first predetermined period and a second analog value is provided during a second predetermined period. The first analog value is representative of the received analog signal's instantaneous value at the moment selected for conversion. The second analog value is predetermined, typically being a null value. The signal conditioning circuit includes a hold circuit to hold the received analog signal's instantaneous value; a generating circuit that generates the second analog value; and an output circuit that selectively outputs the instantaneous value or the predetermined value to the ADC. The hold circuit, the generating circuit and the output circuits are synchronized with the clock signal clocking the ADC so that the ADC's input signal aperture is contained or centered, or both, substantially within the first predetermined period.

REFERENCES:
patent: 3699325 (1972-10-01), Montgomery, Jr. et al.
patent: 4366469 (1982-12-01), Michaels et al.
patent: 4888587 (1989-12-01), Kuraishi
patent: 5248973 (1993-09-01), Babu et al.
"A 4GHz 8b Data Acquisition System", K. Rush and P. Byrne, Hewlett-Parkard Company (1991).

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