1970-03-30
1976-02-03
Larkins, William D.
357 13, 357 23, 357 52, 357 86, H01L 2978
Patent
active
039368629
ABSTRACT:
A novel MISFET and method of manufacture involving a five mask process suitable for making N-channel devices alone, P-channel devices alone or both N and P-channel devices simultaneously. Novel topside contact means, field inversion protection means and gate breakdown protection means are disclosed.
REFERENCES:
patent: 3395320 (1968-07-01), Ansley
patent: 3440502 (1969-04-01), Lin et al.
patent: 3469155 (1969-09-01), Van Beek
patent: 3519897 (1970-07-01), Ferrell
patent: 3555374 (1971-01-01), Usada
patent: 3577043 (1971-05-01), Cook
GE Transistor Manual, 7th Edition (1964), p. 12.
Larkins William D.
National Semiconductor Corporation
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