LSI Chip package and method

Details LSI Chip package and method LSI Chip package and method

1974-12-20

1978-09-19

Smith, Jr., David

Electricity: electrical systems and devices

Electrostatic capacitors

Fixed capacitor

357 81, H05K 720

Patent

active

041158377

ABSTRACT:
Package for an LSI chip having a plurality of contact pads comprising a carrier and a cover. The carrier is formed of a base of an insulating material and has a generally planar area for receiving the chip. A cooling stud is mounted on the base and can be provided with one or more removable cooling fins. The stud is mounted on the base opposite the area for receiving the chip. Spaced leads are carried by the base and have outer extremities which extend beyond the base in a direction away from the chip and are free of the carrier and have inner extremities which are in close proximity to the area for receiving the chip. A grounding bus is carried by the carrier to facilitate electrical checking of the package.

REFERENCES:
patent: 3277957 (1966-10-01), New et al.
patent: 3405323 (1968-10-01), Surty et al.
patent: 3601522 (1971-08-01), Lynch
patent: 3617817 (1971-11-01), Kawakatsu et al.
patent: 3634600 (1972-01-01), Griffin
patent: 3651434 (1972-03-01), McGeough et al.
Carroll et al., "Single Chip Carrier Package", IBM Tech. Discl. Bull., vol. 12, No. 4, Sept. 1969, p. 538.

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