Switched capacitor switching

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Details

328167, G06G 718, H03K 500

Patent

active

046985964

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

The present invention relates to switched capacitor circuits and particularly though not exclusively to active switched capacitor filters including switches, capacitors and amplifiers.
Active RC filters have the potential to be constructed using integrated circuit technology. The time constants or RC products of these circuits however must be accurately defined, implying that the absolute values of resistance and capacitance should be closely controllable. This is not possible however. Switched capacitor circuits offer a solution to this difficulty since the transfer function of these circuits is a function of the ratio of circuit capacitors and the frequency of the switch clock. Capacitor ratios can be held to about 0.3% accuracy and precise switching frequencies can be obtained from crystal controlled clocks. Thus the switched capacitor circuit offers a realistic solution to the problem of designing a high precision filter which can be manufactured as a monolithic integrated circuit.
It is generally recognized that, in intergrated circuits, parasitic capacitances are present associated with the desired circuit elements and, due to the low values of capacitors permitted on an integrated circuit (design features as small as 1 micron are possible with VLSI using MOS), these parasitic capacitances cause unacceptable deviations in filter response. This has led to the design of so-called "parasitic insensitive" switched capacitor circuits wherein the circuit structures are constrained such that the addition of stray or parasitic capacitance from any node in the circuit to ground does not affect the circuit response. Integrator circuits and higher order filters consisting of interconnections of such integrators have been made "parasitic insensitive" and this has led to the development of high quality integrated filters.
The immunity to the effect of parasitic capacitances obtained by the use of parasitic insensitive circuits, however, includes only capacitances which are grounded and therefore does not extend to the parasitic capacitances associated with the control terminals of the switch elements. The inventors have analyzed the effects of these capacitances and have shown that they can be the cause of a major deterioration of circuit performance by introducing DC offset voltage, modification of the transfer function and distortion. Furthermore the inventors have shown that when switched capacitor circuits are operated using the 2-phase switching waveforms normally adopted for parasitic insensitive circuits there is a further disadvantage in that the degredation characteristics mentioned above are unpredictable since they are critically dependent on the relative opening times of nominally identical switches fed with nominally identical control signals.


SUMMARY OF THE INVENTION

The object of the present invention is to provide an improved integrator for use in switched capacitor circuits.
The invention modifies the switching waveforms applied to switched capacitor circuits including parasitic insensitive integrators of the kind defined by comprising: an integrating capacitor; (E2) and a first odd phase switch (O2); one pole of at least one switched capacitor; and the opposed pole of the at least one switched capacitor being connected to the interconnection between a second even phase switch (E1) and a second odd phase switch (O1).
Conventionally 2-phase non-overlapping clock switching signals are applied to the four switches with the even switches being switched simultaneously and the odd switches also being switched simultaneously, the arrangement being such that the even switches are open during the odd phase of the switching signal and the odd switches are open during the even phase of the switching signal, and the reference voltage level is ground.
According to the present invention a parasitic insensitive circuit comprises: a parasitic insensitive integrator as defined above, and a clock circuit for producing periodic switching signals, each switching signal having the same

REFERENCES:
patent: 4313096 (1982-01-01), Fleischer
Laker et al., "Parasitic Insensitive Bi-Phase Switched Cap. Filters" ISCS, pp. 435-439, May 1982.
Herbst et al., "Vis-SC-Filter with Reduced Influences of Parasitic Capacitances", IEE Proc., vol. 129, No. 2, Apr. 1982, pp. 29-39.
Martin et al., "Strays-Insensitive Switched-Capacitor Filters Based on Bilinear Z-Transform", Electronics Letters, 21 Jun. 79, vol. 15, No. 13, pp. 365-366.
Martin, "Improved Circuits for the Realization of Switch Cap. Filters", Proc. of 1979 IEEE International Symp. on Cict and Systems, pp. 756-759.
Article by J. Pandel entitled "Switched-Capacitor Elements for VIS-SC Filters" pp. 121-130.
Article by Ian A. Young in the IEEE Journal of Solid-State Circuits, vol. SC-15, No. 6, Dec. 1980, entitled "A Low-Power NMOS Transmit/Receive IC Filter for PCM Telephony" pp. 997-1005.
Article by R. Gregorian "Filtering Techniques with Switched-Capacitor Circuits " Microelectronics Journal vol. 11 (1980) Mar./Apr. No. 2 Luton pp. 13-21.

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