Fishing – trapping – and vermin destroying
Patent
1992-02-18
1994-05-03
Fourson, George
Fishing, trapping, and vermin destroying
437 62, 437 64, 437 67, 437 74, 437141, 437149, 437154, 437 61, 148DIG12, 148DIG35, H01L 2176
Patent
active
053087763
ABSTRACT:
A method of manufacturing an SOI type substrate by forming a poly-Si layer on the surface of the one Si single crystal wafer (A), then forming a SiO.sub.2 film on the surface of the other Si single crystal wafer (B), bonding these wafers with each other, removing the end portion of the one Si single crystal wafer (A) by a polishing method leaving a part of this Si single crystal wafer as an element forming layer, providing a high concentration impurity region by selectively introducing impurity into the element forming layer and forming a high concentration impurity diffused region in the vicinity of interface with the poly-Si layer of the element forming layer by heat treatment; and a bipolar transistor formed on an SOI type substrate forming a high concentration impurity diffused region as a buried collector layer.
REFERENCES:
patent: 4549914 (1985-10-01), Oh
patent: 4826787 (1989-05-01), Muto et al.
Haisma, J., et al., "Silicon-on -Insulator Wafer Bonding . . . Evaluation", J. Journal Appl. Phys. vol. 28, No. 8 pp. 1426-1443 (1989).
"Wafer Bonding With Stress Free Trench Isolation", IBM Tech. Disc. Bull. vol. 34, No. 2, Jul. 1991, pp. 304-305.
Fourson George
Fujitsu Limited
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