Method and system for processing exponents in floating-point mul

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G06F 752

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045905843

ABSTRACT:
In floating-point multiplication, the sum of the exponents of the two operands is determined by the use of a single adder. The exponents are modified either before they are inputted to the adder or at the output of the adder. A carry signal of "1" is applied whenever addition is carried out. A signal indicative of occurrence of underflow or overflow is also obtained.

REFERENCES:
patent: 4366548 (1982-12-01), Kregness et al.
patent: 4429370 (1984-01-01), Blau et al.
patent: 4511990 (1985-04-01), Hagiwara et al.
Ahearn et al., "Characteristic Overflow or Underflow Detection in Floating Point Operations", IBM Tech. Disclosure Bulletin, vol. 7, No. 8, Jan. 1965, pp. 664-665.
Hale et al., "Biased and Non-Biased Binary Conversion and Exponent Under/Over Flow Detection", IBM Tech. Disclosure Bulletin, vol. 23, No. 1, Jun. 1980, pp. 252-254.
Nave & Palmer, "A Numeric Data Processor", IEEE Int'l Solid-State Circuits Conf., Feb. 1980.
"iAPX 86/20; iAPX 88/20; Numeric Data Processor", Intel Component Data Catalog, Jul. 1981.

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