Flip-flop with identical propagation delay in clock pass through

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307465, 307479, 307480, 307591, 307602, H03K 3037, H03K 513

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active

047975750

ABSTRACT:
A flip-flop circuit is provided for use in a phase-locked loop circuit, the flip-flop having two signal paths for selecting a VCO output during velocity lock and phase lock. The two signal paths comprise identical environments and therefore eliminate the phase step exhibited by prior art designs in shifting between velocity lock and phase lock. The circuit is also useful in any application where a clock to output delay of a flip-flop connected for normal operation, must have its propagation delay matched to a circuit which simply delays a signal by the same amount.

REFERENCES:
patent: 3930169 (1975-12-01), Kuhn, Jr.
patent: 4002926 (1977-01-01), Moyer
patent: 4019144 (1977-04-01), Lincoln et al.
patent: 4477738 (1984-10-01), Kouba
patent: 4506165 (1985-03-01), Gulati et al.
patent: 4506167 (1985-03-01), Little et al.
patent: 4629909 (1986-12-01), Cameron
Puri et al, "Flush-Through Latch", IBM T.D.B., vol. 24, No. 7A, Dec. 1981, pp. 3115-3116.

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