Flip-flop circuit, and shift register circuit, serial-parallel c

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

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327219, H03K 3289

Patent

active

056990022

ABSTRACT:
The power consumption of a flip-flop circuit is reduced and an output magnitude is increased to prevent a malfunction from occurring often. In order to reduce the power consumption, an emitter-coupled logic with series gating is used for the master latch of the flip-flop circuit. A series gating is not used but an ECL having transistors connected in parallel is used for the gates of a slave latch so as to increase the output magnitude.

REFERENCES:
patent: 5059819 (1991-10-01), Tanaka et al.
patent: 5155383 (1992-10-01), Barbera
patent: 5172011 (1992-12-01), Leuthold et al.
patent: 5239206 (1993-08-01), Yanai
patent: 5359241 (1994-10-01), Hasegawa et al.
patent: 5552737 (1996-09-01), Chen
patent: 5572536 (1996-11-01), Thiruvengadam

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