Loop optimization system

Boots – shoes – and leggings

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364938, 364262, G06F 945, G06F 906

Patent

active

053033574

ABSTRACT:
In loop processing by an electronic computer that simultaneously executes a plurality of instructions, a loop optimization system according to this invention comprises loop analyzing means for judging whether or not the process of expanding iterations of instructions in a loop into one iteration is performed based on at least one of the number of operations in each iteration in the loop and the number of memory access instruction; loop expanding means for converting a given number of iterations in an instruction sequence of the loop into an equivalent instruction sequence where those iterations are expanded into one iteration; and loop optimizing means for rearranging instructions in the developed loop so that different repetitious operations may be allocated to separate processing units for simultaneous execution.

REFERENCES:
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patent: 4858115 (1989-08-01), Rusterholz
patent: 5109331 (1992-04-01), Ishida et al.
patent: 5226128 (1993-07-01), Rau
patent: 5230053 (1993-09-01), Zaiki
Proc. of 2nd ASPLOS, pp. 105-109, 1987, S. Weiss, et al., "A Study of Scalar Compilation Techniques for Pipelined Supecomputers".
Proc. of ACM Sigplan 1988 Conf. on Prog. Lang. Design and Implementation, pp. 318-328, 1988, M. Lam, "Software Pipelining: An Effective Scheduling Technique for VLIW Machines".

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