Method for testing mixed scan and non-scan circuitry

Details Method for testing mixed scan and non-scan circuitry Method for testing mixed scan and non-scan circuitry

1990-09-07

1992-12-15

Canney, Vincent P.

Excavating

371 226, G01R 3128

Patent

active

051723778

ABSTRACT:
A method of performing in-circuit testing of interior points of circuit boards containing both boundary-scan and non-scan components that utilizes the boundary-scan facility. The testing procedure involves isolation of the non-scan components and either driving or sensing voltages at physically accessible test sites. The method permits use of isolation and multiplexing solutions that are ordinarily developed for in-circuit testing of board components, resulting in efficient design and implementation of interconnect tests.

REFERENCES:
patent: 5043986 (1991-08-01), Agrawal et al.
patent: 5065090 (1991-11-01), Gheewala
patent: 5084874 (1992-01-01), Whersel, Jr.

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