Fishing – trapping – and vermin destroying
Patent
1993-11-01
1996-03-12
Fourson, George
Fishing, trapping, and vermin destroying
437 57, 437 40, 148DIG126, H01L 218238
Patent
active
054985536
ABSTRACT:
A semiconductor is made on a silicon substrate containing an impurity of a predetermined polarity having formed therein a well containing an impurity of an opposite polarity to a region in the silicon is provided. The method comprises forming a first masking layer on the surface of the substrate, providing openings in the masking layer and implanting dopant ions of a first polarity into the surface of the substrate in a set of first implant regions in the well on either side of a first central region in the well and in a set of second implant regions adjacent to the well on either side of a second central region adjacent to the well, formation of insulating structures over the first and second regions, forming gate oxide layers above the first and second central regions, forming a second masking layer on the surface of the substrate, providing openings in the masking layer and implanting dopant ions of a second polarity into the surface of the substrate in a set of second implant regions in the well on either side of a first central region in the well and in a set of fourth implant regions adjacent to the well on either side of a second central region adjacent to the well, and formation of conductive gate structures over the gate oxide layers.
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Z. Parpia et al. "A Novel CMOS-Compatible High Voltage Transistor Structure" IEEE Trans Electron Devices, vol. ED-33, pp. 1948-1952 (Dec. 1986).
R. Jayaraman et al, "Comparison of High Voltage Devices for Power Integrated Circuits" pp. IEDM 84 258-261 (1984).
Booth Richard A.
Fourson George
Jones II Graham S.
Saile George O.
United Microelectronics Corporation
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