Bootstrapped FET sampling switch

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307352, 307353, 307572, 328151, 341163, 341172, H03K 17687, H03K 112

Patent

active

051720191

ABSTRACT:
In an analog-to-digital converter, a circuit for sampling an analog input signal that has a signal range above and below a ground reference voltage includes a divider circuit scaling the analog input signal down to a lower magnitude such that all values of the scaled analog input signal are above the ground reference voltage. The scaled down analog input signal is applied to a source electrode of a sampling MOSFET. A body-to-source voltage of the sampling MOSFET is maintained at approximately zero volts by applying the scaled down signal to a non-inverting input of a first operational amplifier and applying an output voltage produced by the first operational amplifier to its inverting input and a body electrode of the sampling MOSFET. A gate-to-source voltage of the sampling MOSFET is maintained at approximately 1.5 volts by applying the scaled down analog input signal to a non-inverting input of a second operational amplifier, an output of which is applied to a gate electrode of the sampling MOSFET and to a gate electrode of a first MOSFET. A constant current is forced through the first MOSFET, producing therein a constant gate-to-source voltage independent of variation in the analog input signal. The resulting voltage on the source of the first MOSFET is applied to an inverting input of the second operational amplifier, so the constant gate-to-source voltage of the first MOSFET is imposed between the gate and source of the sampling MOSFET.

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patent: 5084634 (1992-01-01), Gorecki

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