Fishing – trapping – and vermin destroying
Patent
1992-08-24
1993-11-30
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 44, 437 45, 437913, 437192, H01L 21265
Patent
active
052665089
ABSTRACT:
A process for manufacturing a semiconductor device which comprises the following steps of (i) forming a first insulating film on the whole surface of a semiconductor substrate having thereon a thin conductive layer with an intervening gate insulating film, (ii) removing the first insulating film at a channel region to cause the thin conductive layer to be exposed, thereby forming an opening portion, (iii) implanting ions in the opening portion to form a channel region in the substrate, (iv) forming a gate electrode of a conductive material in the opening portion, (v) removing only the first insulating film with leaving the gate electrode as it is and then implanting ions by using the gate as a mask to form a low carrier density region in the substrate, (vi) layering a second insulating film on the substrate including the gate and then carrying out an anisotropic etching to build a sidewall of the gate electrode, and (vii) implanting ions by use of the gate electrode and its sidewall as a mask to form a high carrier density region on the substrate, whereby completing an insulating gate type of field effect transistor having a low carrier density region for mitigating field effect, the low carrier density region adjoining to source and drain regions of high carrier density.
REFERENCES:
patent: 4948745 (1990-08-01), Pfiester et al.
patent: 4963504 (1990-10-01), Huang
patent: 4971922, Watabe et al.
patent: 5015599 (1991-05-01), Verhaar
patent: 5061647 (1991-10-01), Roth et al.
patent: 5082794 (1992-01-01), Pfiester et al.
patent: 5102815 (1992-04-01), Sanchez
Azuma Ken-ichi
Kawamura Akio
Hearn Brian E.
Nguyen Tuan
Sharp Kabushiki Kaisha
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