Code breakpoint decoder

Boots – shoes – and leggings

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3642755, 39518306, 39518504, 395704, G06F 1130, G06F 930

Patent

active

057179093

ABSTRACT:
A computer with a pipelined processor and code breakpoints for performing software debug operations includes prefetch and decode stages, debug address registers for storing code breakpoints representing addresses of preselected instructions, and two digital comparators. During the instruction prefetch phase of operation, the first comparator compares the against the code breakpoints stored in the debug address registers and produces a 1-bit signal indicating whether such comparison results in a positive match. Subsequently, during the decode phase of operation, the 32-bit prefetch instruction address and produces a 1-bit signal indicating whether such comparison results in a positive match. These two 1-bit 32-bit prefetch instruction address to ensure that such two 1-bit signals are based upon corresponding comparisons of the same prefetch instruction address.

REFERENCES:
patent: 4860195 (1989-08-01), Krauskopf
patent: 5189319 (1993-02-01), Fung et al.
patent: 5204953 (1993-04-01), Dixit
patent: 5254888 (1993-10-01), Lee et al.
patent: 5259006 (1993-11-01), Price et al.
patent: 5263153 (1993-11-01), Intrater et al.
patent: 5404473 (1995-04-01), Papworth et al.
patent: 5408626 (1995-04-01), Dixit
patent: 5453927 (1995-09-01), Matsuo et al.
patent: 5485587 (1996-01-01), Matsuo et al.
patent: 5542075 (1996-07-01), Ebcioglu et al.
Serra, Micaela & Dervisoglu, Bulent I, "Testing", Chapter 79, The Electrical Engineering Handbook, Richard C. Dorf, Editor-in-Chief, pp. 1808-1837, CRC Press.
L-T Wang et al. "Feedback Shift Registers For Self-Testing Circuits", VLSI System Design, Dec. 1986.
Masakazu Shoji, "CMOS Dynamic Gates", Chapter 5, AT&T CMOS Digital Circuit Technology, Prentice Hall, 1988, pp.210-257.
Guthrie, Charles, "Power-On Sequencing For Liquid Crystal Displays, Why, When and How", Sharp Application Notes, Sharp Corporation, 1994, pp. 2-1 thru 2-9.
Bernd Moeschen, "NS32SP160 --Feature Communication Controller Architecture Specification", National Semiconductor, Rev. 1.0, May 13, 1993.
Agarwal, Rakesh K., 80.times.86 Architecture and Programming, vol. II: Architecture Reference, Chapter 4, Prentice Hall, 1991, pp. 542-543.
Intel486 Microprocessor Family Programmer's Reference Manual, Intel Corporation, 1993.
"8237A High Performance Programmable DNA Controller (8237A, 8237A-4, 8237A-5)", Peripheral Components, Intel, 1992, pp. 3-14 thru 3-50.
Kane, Gerry, "R2000 Processor Programming Model", Chapter 2, MIPS RISC Architecture, MIPS Computer Systems Inc.
Hennessy, John, et al., "Interpreting Memory Addresses", Computer Architecture A Quantitative Approach, pp. 95-97, Morgan Kaufmann Publishers, Inc. 1990.
PowerPC601 Reference Manual, IBM, 1994, Chapter 9, "System Interface Operation", pp. 9-15 thru 9-17.
Intel Corp. Microsoft Corp., Advanced Power Management (APM) BIOS Interface Specification, Revision 1.1, Sep. 1993.
Intel Corporation, i486 Micro Processor Hardware Reference Manual, Processor Bus, pp. 3-28 thru 3-32.

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