Method and apparatus for transmitting memory requests by transmi

Details Method and apparatus for transmitting memory requests by transmi Method and apparatus for transmitting memory requests by transmi

1997-09-11

1999-02-16

Barry, Lance Leonard

G06F 1300

Patent

active

058729968

ABSTRACT:
A high speed bus system in which at least one master device, such as a processor and at least one DRAM slave device are coupled to the bus. An innovative packet format and device interface which utilizes a plurality of time and space saving features in order to decrease the die size of the device receiver and decrease the overall latency on the bus is provided. In the preferred embodiment the request packet is transmitted on ten The packet is transmitted over six sequential bus cycles, wherein during each bus cycle, a different portion of the packet is transmitted. The lower order address bits are moved ahead of the higher order address bits of the memory request. This enables the receiving device to process the memory request faster as the locality of the memory reference with respect to previous references can be immediately determined and page mode accesses on the DRAM can be initiated as quickly as possible. The type of memory access is arranged over a plurality of clock cycles, placing the more critical bits first. The count of blocks of data requested is arranged to minimize the number of bit positions in the packet used and therefore the number of transmission lines of the bus and the number of bus receiver contacts on the receiving device.

REFERENCES:
patent: 3728693 (1973-04-01), Macker et al.
patent: 3771135 (1973-11-01), Huettner et al.
patent: 3956739 (1976-05-01), Ophir et al.
patent: 4166289 (1979-08-01), Murtha et al.
patent: 4315308 (1982-02-01), Jackson
patent: 4481625 (1984-11-01), Roberts et al.
patent: 4523274 (1985-06-01), Fukunaga et al.
patent: 4785394 (1988-11-01), Fischer
patent: 4785396 (1988-11-01), Murphy et al.
patent: 4811202 (1989-03-01), Schabowski
patent: 4845663 (1989-07-01), Brown et al.
patent: 4860198 (1989-08-01), Takenaka
patent: 4901276 (1990-02-01), Iijima
patent: 4912627 (1990-03-01), Ashkin et al.
patent: 5063612 (1991-11-01), McKeown
patent: 5301303 (1994-04-01), Abraham et al.
patent: 5319755 (1994-06-01), Farmwald et al.
patent: 5339307 (1994-08-01), Curtis
patent: 5408129 (1995-04-01), Farmwald et al.
James Martin & Kathleen Kavanagh Chapman, "Local Area Networks Architectures and Implementations", 1989, pp. 33, 84-88, 223-224.
Steve Gumm and Carl T. Dreher, Texas Instruments, "Unraveling the intricacies of dynamic RAMs", Mar. 30, 1989, pp. 155-166.

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