Decoded instruction buffer apparatus and method for reducing pow

Details Decoded instruction buffer apparatus and method for reducing pow Decoded instruction buffer apparatus and method for reducing pow

1996-08-09

1998-04-21

Lall, Parshotam S.

395750, G06F 930, G06F 132

Patent

active

057427810

ABSTRACT:
The present invention is directed to a digital signal processor having a local buffer for storing decoded instruction words during the first pass through a program loop, so that subsequent iterations through the program loop can be accomplished without the use of the instruction fetch and decode circuitry, thereby saving power.

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