Classifying – separating – and assorting solids – Sorting special items – and certain methods and apparatus for... – Condition responsive means controls separating means
Patent
1998-08-13
2000-11-14
Nguyen, Tuan N.
Classifying, separating, and assorting solids
Sorting special items, and certain methods and apparatus for...
Condition responsive means controls separating means
209571, 324765, 3241581, B07C 5344
Patent
active
061473162
ABSTRACT:
An inventive method for sorting integrated circuit (IC) devices of the type having a substantially unique identification (ID) code, such as a fuse ID, includes automatically reading the ID code of each of the IC devices, and sorting the IC devices in accordance with their automatically read ID codes. The inventive method can be used in conjunction with an IC manufacturing process that includes providing semiconductor wafers, fabricating the IC's on each of the wafers, causing each of the IC's to store its ID code, separating each of the IC's from its wafer to form IC dice, assembling the IC dice into IC devices, and testing the IC devices. The inventive method is useful for, among other things, culling IC reject bins for shippable IC's, sorting IC's from a wafer lot into those that require enhanced reliability testing and those that do not, and allowing IC's fabricated using both a control fabrication process recipe and a new fabrication process recipe under test to be assembled and tested using the same equipment to reduce unintended test variables introduced when the IC's are assembled and tested separately.
REFERENCES:
patent: 4510673 (1985-04-01), Shils et al.
patent: 4667403 (1987-05-01), Edinger et al.
patent: 4871963 (1989-10-01), Cozzi
patent: 4954453 (1990-09-01), Venutolo
patent: 4958373 (1990-09-01), Usami et al.
patent: 4967381 (1990-10-01), Lane et al.
patent: 5003251 (1991-03-01), Fuoco
patent: 5103166 (1992-04-01), Jeon et al.
patent: 5105362 (1992-04-01), Kotani
patent: 5217834 (1993-06-01), Higaki
patent: 5219765 (1993-06-01), Yoshida et al.
patent: 5226118 (1993-07-01), Baker et al.
patent: 5271796 (1993-12-01), Miyashita et al.
patent: 5289113 (1994-02-01), Meaney et al.
patent: 5294812 (1994-03-01), Hashimoto et al.
patent: 5301143 (1994-04-01), Ohri et al.
patent: 5420796 (1995-05-01), Weling et al.
patent: 5440493 (1995-08-01), Doida
patent: 5442561 (1995-08-01), Yoshizawa et al.
patent: 5450326 (1995-09-01), Black
patent: 5467304 (1995-11-01), Uchida et al.
patent: 5483175 (1996-01-01), Ahmad et al.
patent: 5495417 (1996-02-01), Fuduka et al.
patent: 5511005 (1996-04-01), Abbe et al.
patent: 5516028 (1996-05-01), Rasp et al.
patent: 5538141 (1996-07-01), Gross, Jr. et al.
patent: 5568408 (1996-10-01), Maeda
patent: 5581510 (1996-12-01), Furusho et al.
patent: 5603412 (1997-02-01), Gross, Jr. et al.
patent: 5642307 (1997-06-01), Jernigan
patent: 5844803 (1998-12-01), Beffa
patent: 5865319 (1999-02-01), Okuda et al.
patent: 5915231 (1999-06-01), Beffa
patent: 5927512 (1999-07-01), Bella
Micro)n Technology, Inc.
Nguyen Tuan N.
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