Method for manufacturing DRAM device using high dielectric const

Fishing – trapping – and vermin destroying

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Other Related Categories

437201, 437235, H01L 218242

Type

Patent

Status

active

Patent number

057417229

Description

ABSTRACT:
A semiconductor device capacitor structure comprises a semiconductor substrate having an impurity diffusion region; an insulating layer formed on the semiconductor substrate and having a contact hole on the impurity diffusion region; a first lower electrode of a half ring type formed on the insulating film along an upper edge of the contact hole; a second lower electrode formed on a surface of the substrate exposed through the contact hole, a wall of the contact hole, and the first lower electrode; a dielectric layer formed on the first and second lower electrodes; and an upper electrode formed on the dielectric layer. This structure increases capacitance, thereby improving the characteristics and reliability of the device.

REFERENCES:
patent: 5223448 (1993-06-01), Su
patent: 5270238 (1993-12-01), Kim
patent: 5335138 (1994-08-01), Sandhu et al.
patent: 5504041 (1996-04-01), Summerfelt
"A Stacked Capacitor With (Ba.sub.x Sr.sub.1-x)TiO.sub.3 for 256M DRAM", Koyama et al., IEDM 91, pp. 823-826, 1991.
"A Newly Designed Planar Stacked Capacitor Cell with High dielectric Constant Film for 256Mbit DRAM", Eimori et al., IEDM 93, pp. 631-634, 1993 .

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