Digital frequency divider

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328 46, H03K 2136, H03K 2106

Patent

active

042675120

ABSTRACT:
An input signal having a frequency is supplied as input to an exclusive `OR` -gate, the signal is sent to a register selected for the number of times the input signal is to be divided, output from the register is sent to an `AND` gate, output from this gate is fed back to the `OR` gate which, after the selected count, inverts the signal to the register resetting the register. Output of the register is an odd function of the input signal.

REFERENCES:
patent: 3341693 (1967-09-01), Hurst
patent: 3395352 (1968-07-01), McCammon
patent: 3725791 (1973-04-01), Moreau et al.
patent: 3967205 (1976-06-01), Rossi et al.
patent: 3992635 (1976-11-01), Suzuki et al.
patent: 4092604 (1978-05-01), Berney

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