Signal generator having minimum delay

Details Signal generator having minimum delay Signal generator having minimum delay

1979-03-05

1981-05-12

Dixon, Harold A.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307DIG3, H03K 326

Patent

active

042674662

ABSTRACT:
A signal generating circuit is provided which provides an output signal in response to an input signal. The output signal has minimum delay with respect to the input signal. The signal generating circuit has an inverter to receive the input signal. A cross coupled latch is coupled to the inverter and provides the output signal. A DC load stage is used as a load for the cross coupled latch. A transistor is coupled to the output signal to pull the output signal low upon command. Control circuitry is coupled to the transistor and helps precondition the signal generating circuitry so that it can respond to the input signal with minimum delay.

REFERENCES:
patent: 3363115 (1968-01-01), Stephenson et al.
patent: 3518635 (1970-06-01), Cole
patent: 4070590 (1978-01-01), Ieda et al.
patent: 4146802 (1979-03-01), Moench

Affiliated with

Also associated with

Rating

Signal generator having minimum delay does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Signal generator having minimum delay, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Signal generator having minimum delay will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2048889