Wiring layer and method of forming the wiring layer

Details Wiring layer and method of forming the wiring layer Wiring layer and method of forming the wiring layer

1997-05-07

2000-07-18

Font, Frank G.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257771, 257 51, H01L 31036, A01L 2348

Patent

active

060911514

ABSTRACT:
The present invention is directed to a wiring layer which has high thermal stability and a better stress migration resistance characteristic as an electrode wiring material that is used in a liquid crystal display and where there is no defect such as a hillock and the like and the electric resistance is considerably low. More specifically, the present invention is directed to a wiring layer which comprises at least two layers formed on a substrate. The two layers include: a first layer which has substantially aluminum for its main component and a second layer formed on the first layer which has substantially the same component as the first layer. Also, the second layer is higher in electric resistance than the first layer and has an amorphous phase for its main phase. The second layer may also include microcrystals which have a crystal particle diameter D.sub.2 smaller than a crystal particle diameter D.sub.1 of the first layer.

REFERENCES:
patent: 4899206 (1990-02-01), Sakurai et al.
patent: 5107355 (1992-04-01), Satoh et al.
patent: 5148259 (1992-09-01), Kato et al.
patent: 5406121 (1995-04-01), Toyoda
patent: 5541007 (1996-07-01), Ueda et al.

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