Method of manufacturing a wiring layer including amorphous silic

Fishing – trapping – and vermin destroying

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437200, 437201, H01L 2144

Patent

active

055189601

ABSTRACT:
According to a semiconductor device and a manufacturing method thereof of the invention, silicon electrodes are connected to silicon layers in a wiring layer including silicon layers and refractory metal silicide layers formed on silicon layers and an amorphous silicon layer formed on the refractory silicide layer. Thus, good contact between the silicon electrodes and the wiring layer can be provided without the influence of a native oxide film formed on the surface of the refractory metal silicide layers. As a result, a semiconductor device and a manufacturing method thereof implementing reduced contact resistance to a wiring layer including a refractory metal silicide film can be provided.

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