Error checking circuit

Excavating

Patent

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Details

328120, 371 3, 371 63, 371 65, G06F 1116

Patent

active

043421121

ABSTRACT:
An error checking circuit is provided for a digital transmission system having a dual, redundant, bus structure. The error checking circuit generates a two rail logic output having complementary states in the absence of an error, and non-complementary states in response to an error on the buses. The circuit is also self-checking in that internal failures are transmitted to the output as an error indication. The circuit is actively exercised in the absence of an error to prevent silent failures. The circuit can identify which of the buses has failed, for the most common types of failures.

REFERENCES:
patent: 3551886 (1970-12-01), Cook
patent: 3559167 (1971-01-01), Carter et al.
patent: 3601804 (1971-08-01), Wainwright et al.
patent: 3633162 (1972-01-01), Findeisen
patent: 3634665 (1972-01-01), Carter et al.
patent: 3795867 (1974-03-01), Jones, Jr.
patent: 3810119 (1974-05-01), Zieve et al.
patent: 3961203 (1976-06-01), Hutch

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