Method of forming an array of finned memory cell capacitors on a

Details Method of forming an array of finned memory cell capacitors on a Method of forming an array of finned memory cell capacitors on a

1992-04-16

1993-09-14

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437915, 437919, 437978, H01L 2176

Patent

active

052448266

ABSTRACT:
An array of finned memory cell capacitors on a semiconductor substrate includes: a) an array of electrically insulated word lines atop a semiconductor substrate; b) first and second active regions adjacent the word lines; c) capacitor storage nodes electrically connecting with the first active regions, individual capacitor storage nodes including: i) a layer of first conductive material conductively connecting with a first active region, the layer of first conductive material having opposed outer lateral edges, and ii) a layer of conductively doped storage node polysilicon overlying and conductively connecting with the layer of first conductive material, the storage node polysilicon projecting laterally outward beyond the outer lateral edges of the first conductive material to define opposing storage node capacitor fins projecting laterally above adjacent word lines; d) a layer of capacitor dielectric electrically connecting with the storage node capacitor fins; e) a layer of electrically conductive cell polysilicon electrically connecting with the capacitor dielectric layer; and f) bit lines electrically connecting with the second active regions. The invention also includes a method of forming memory cell capacitors.

REFERENCES:
patent: 5116776 (1992-05-01), Chan et al.
patent: 5120674 (1992-06-01), Chin et al.
patent: 5155056 (1992-10-01), Jeong-Gyoo
patent: 5168076 (1992-12-01), Godinho et al.

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