Dynamically adaptive set associativity for cache memories

Details Dynamically adaptive set associativity for cache memories Dynamically adaptive set associativity for cache memories

1992-12-22

1995-11-07

Chan, Eddie P.

Boots, shoes, and leggings

364DIG1, 36424341, 395460, G06F 1208

Patent

active

054653428

ABSTRACT:
A memory cache system for high speed computers provides adaptive set associativity by means of which the degree of associativity of the cache is temporarily and dynamically increased in response to the behavior of the system. More particularly, one or more microcaches is temporarily assigned to a particular location in the main cache memory in response to frequent probes and misses at that location. The temporarily assigned microcache increases the set associativity of that particular location until the microcache is assigned to another location. The reassignability of the microcache reduces the total cache size required as well as the complexity of the control circuitry needed to manage the cache. A cache miss threshold is established which must be exceeded before a location is assigned the microcache, and the microcache remains assigned for only a fixed number of cache accesses called the window size. A least recently used replacement algorithm is used to overwrite entries in the cache.

REFERENCES:
patent: 4493026 (1985-01-01), Olnowich
patent: 4654782 (1987-03-01), Bannai et al.
patent: 4724518 (1988-02-01), Steps
patent: 4802085 (1989-01-01), Levy et al.
patent: 4811209 (1989-03-01), Rubinstein
patent: 4833642 (1989-05-01), Ooi
patent: 4905188 (1990-02-01), Chung et al.
patent: 4914582 (1990-04-01), Bryg et al.
patent: 4928225 (1990-05-01), McCarthy et al.
patent: 4985829 (1991-01-01), Thatte et al.
patent: 4991088 (1991-02-01), Kam
patent: 5014195 (1991-05-01), Farrell et al.
patent: 5025366 (1991-06-01), Baror
patent: 5029070 (1991-07-01), McCarthy et al.
patent: 5029126 (1991-07-01), Yamaguchi
patent: 5043885 (1991-08-01), Robinson
patent: 5091851 (1992-02-01), Shelton et al.
patent: 5113510 (1992-05-01), Hillis
patent: 5210842 (1993-05-01), Sood
patent: 5301296 (1994-04-01), Mohri et al.
patent: 5367653 (1994-11-01), Coyle et al.
Mark D. Hill, Evaluating Associativity in CPU Caches, IEEE Transactions on Computers, vol. 38, No. 12, pp. 1612-1630, 1989.
Mark D. Hill, A Case for Direct-Mapped Caches, Computer, vol. 21, Issue 12, pp. 25-40, Dec. 14, 1988.
N. P. Jouppi, "Improving Direct-Mapped Cache Performances by the Addition of a Small Fully-Associative Cache and Prefetch Buffers," 1990 Proceedings, CH2887-8/90/0000/10364, pp. 364-373, Aug. 1990.

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