Field effect transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

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257284, 257615, 257745, H01L 310328

Patent

active

055043534

ABSTRACT:
A buffer layer 2 composed of undoped GaAs or undoped AlGaAs, an n-type AlGaAs electron supply layer 3, an undoped InGaAs channel layer 4, an AlGaAs electron supply layer 5 composed of n-type AlGaAs or undoped AlGaAs, an n-type InGaP contact lower layer 16, and an n-type GaAs contact upper layer 7 are formed on a semiinsulating GaAs substrate 1. A gate electrode is formed on the AlGaAs electron supply layer 5. A drain electrode and a source electrode are formed on the GaAs contact upper layer 7. Thus, in the FET with double-recess structure, the drain current can be increased and the gate breakdown voltage can be improved.

REFERENCES:
patent: 5313093 (1994-05-01), Nakagawa
"Super Low-Noise GaAs MESFET's with a Deep-Recess Structure"; IEE Transactions on Electron Devices, vol. ED-27; No. 6; Jun. 1990; pp. 1029-1034.
Huang, J. C., et al; "An AlGaAs/InGaAs Pseudomorphic High Electron . . . " IEEE MTT-S Digest, pp. 713-716, 1991.
Takikawa, M., et al; "Pseudomorphic N-InGaP/InGaAs/GaAs High . . . " IEEE Electron Device Letters, vol. 14, No. 6, Aug. 1993.

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