Fishing – trapping – and vermin destroying
Patent
1996-07-22
1997-12-30
Chaudhari, Chandra
Fishing, trapping, and vermin destroying
437 44, 437983, 148DIG111, H01L 21266
Patent
active
057029679
ABSTRACT:
A process for fabricating a deep submicron MOSFET device gas been developed, preparing a narrow local threshold voltage adjust region in a semiconductor substrate, with the narrow local threshold voltage adjust region self aligned to an overlying, narrow polysilicon gate structure. The process consists of forming a narrow hole opening in an insulator layer, followed by an ion implantation procedure used to place the threshold voltage adjust region in the specific area of the semiconductor substrate, underlying the narrow hole opening, A polysilicon deposition, followed by an oxidation process, converts the unwanted polysilicon to a silicon oxide layer, while leaving unconverted polysilicon in the narrow hole opening, Removal of the oxidized polysilcon regions results in a narrow polysilicon gate structure, in the narrow hole opening, self aligned to the threshold voltage adjust region.
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Ackerman Stephen B.
Chaudhari Chandra
Saile George O.
Vanguard International Semiconductor Corporation
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