Antifuse with silicon spacers

Details Antifuse with silicon spacers Antifuse with silicon spacers

1994-03-31

1996-11-05

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

257 50, 257 52, 257543, H01L 2900, H01L 2904

Patent

active

055720625

ABSTRACT:
A method and resulting antifuse structure in an integrated circuit include a first metal interconnection layer on a first insulating layer over the substrate of the integrated circuit, a second insulating layer over the first metal interconnection layer. The second insulating layer has a via therein and a programming layer is located in the via. Such programming layer includes a first region on the first metal interconnection layer which is removed from sides of the second insulating layer in the via, and a second region on the sides of the second insulating layer via. The first region has substantially a first thickness, the second region has substantially a second thickness which is greater than the first thickness. Upon programming the antifuse structure, a conducting link forms in the first region of the programming layer.

REFERENCES:
patent: 5166556 (1992-11-01), Hsu et al.
patent: 5250464 (1993-10-01), Wong et al.
patent: 5272101 (1993-12-01), Forouhi et al.
patent: 5369054 (1994-11-01), Yen et al.
patent: 5384481 (1995-01-01), Holzworth et al.

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