Method of forming shallow junctions in field effect transistors

Details Method of forming shallow junctions in field effect transistors Method of forming shallow junctions in field effect transistors

1991-11-12

1993-12-07

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437160, 437 29, 437200, 437950, H01L 21265, H01L 2144

Patent

active

052683176

ABSTRACT:
A method of making a MOS field effect transistor having shallow source and drain regions with improved breakdown and leakage characteristics includes the step of forming a layer of a metal silicide along a surface of a body of silicon at each side of a gate which is on an insulated from the surface. A high concentration of an impurity of a desired conductivity type is implanted only into the metal silicide layers. A lower concentration of the impurity is then implanted through the metal silicide layers and into the body just beneath the metal silicide layers. The body is then annealed at a temperature which drives the impurities from the metal silicide layer into the body to form the junctions.

REFERENCES:
patent: 4558507 (1985-12-01), Okabayashi et al.
patent: 4622735 (1986-11-01), Shibita
patent: 4683645 (1987-08-01), Naguib et al.
patent: 4717684 (1988-01-01), Kaffo et al.
patent: 4761384 (1988-08-01), Neppl et al.
patent: 4764478 (1988-08-01), Hiruta
patent: 4774204 (1988-09-01), Havemann
patent: 4788160 (1988-11-01), Havemann et al.
patent: 4816423 (1989-03-01), Havemann
patent: 4835112 (1989-05-01), Pfiester et al.
patent: 4843023 (1989-06-01), Chiu et al.
patent: 4889820 (1989-12-01), Mori
patent: 4900688 (1990-02-01), Halvis
patent: 4912053 (1990-03-01), Schrantz
patent: 4914500 (1990-04-01), Liu et al.
patent: 4922311 (1990-05-01), Lee et al.
patent: 5028554 (1991-07-01), Kita
"Leakage Mechanisms in Ultra-Shallow Silicided Source/Drain Junctions of Deep Submicron MOSFETs", Schwalke et al., sent Apr. 11, 1991 for consideration for presentation at the 1991 International Conference on Solid-State Devices and Materials, Yokohama, Japan, Aug. 27-29, 1991.
"Modified Schottky Behavior in Shallow p.sup.+ -n Junctions Formed by Outdiffusion from Cobalt Silicide", Lebowitz et al., IEEE Transactions on Electron Devices, vol. ED-34, No. 11, Nov. 1987, pp. 2366.
"Formation of Silicided, Ultra-Shallow Junctions Using Low Thermal Budget Processing", C. M. Osburn, Journal of Elec. Materials, vol. 19, 1990, pp. 67-88.
"Thermal Budget Issues for Manufacturing Deep Submicron ULSI", Fair et al., Technical Report TR89-61, Dec. 12, 1989.

Affiliated with

Also associated with

Rating

Method of forming shallow junctions in field effect transistors does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming shallow junctions in field effect transistors, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming shallow junctions in field effect transistors will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2015474