Method of forming a back end capacitor with high unit capacitanc

Fishing – trapping – and vermin destroying

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437919, H01L 2170, H01L 2700

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active

055717462

ABSTRACT:
This invention provides a structure and a method of forming a capacitor with a high unit capacitance for use in analog circuits and a bond pad which will eliminate bond pad peeling during subsequent processing. The bottom capacitor plate is formed at the same time the bond pads are formed. The bottom capacitor plate and the bond pads are formed using a conducting material such as doped polysilicon, which will eliminate bond pad peeling during subsequent processing. The top capacitor plate is formed when the top electrode pattern is formed. This integrated process provides a bond pad which will eliminate bond pad peeling during subsequent process steps and a capacitor with high unit capacitance for use in analog circuits.

REFERENCES:
patent: 4495222 (1985-01-01), Anderson et al.
patent: 5122477 (1992-06-01), Wolters et al.
patent: 5397729 (1995-03-01), Kayanuma et al.
patent: 5500387 (1996-03-01), Tung et al.

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