Patent
1980-06-16
1983-07-12
Clawson, Jr., Joseph E.
357 55, H01L 2978
Patent
active
043933912
ABSTRACT:
A semiconductor device providing improved utilization of semiconductor surface area by enhancing the current carrying capability per unit area. The improvement arises from contouring the surface in the conductive channel region of the device so that the current carrying channel is wider than the plane surface that it occupies. This morphology may be achieved by forming troughs having optional rectangular, "U", or "V" shapes; the troughs run parallel to the conductive channel current flow. The improvement is especially useful for MOS and power MOS transistors, and is applicable to DMOS transistors as well as conventional MOS transistors.
REFERENCES:
patent: Re29971 (1979-04-01), Nishizawa et al.
patent: 2980809 (1961-04-01), Teszner
patent: 3766448 (1973-10-01), Luce et al.
patent: 3851379 (1974-12-01), Gutknecht et al.
patent: 3953879 (1976-04-01), O'Arlach et al.
patent: 4005467 (1977-01-01), Vergnolle
patent: 4065742 (1977-12-01), Kendall et al.
patent: 4065782 (1977-12-01), Gray et al.
patent: 4234887 (1980-11-01), Vanderslice
patent: 4254430 (1981-03-01), Beneking
L Heller, "Double Density VMOS CCD," IBM Tech. Discl. Bull., vol. 22 #11, Apr. 1980, pp. 4859-4860.
Clawson Jr. Joseph E.
Supertex Inc.
Weiss Harry M.
LandOfFree
Power MOS transistor with a plurality of longitudinal grooves to does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Power MOS transistor with a plurality of longitudinal grooves to, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Power MOS transistor with a plurality of longitudinal grooves to will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-201171