Printer having processor with instruction cache and compressed p

Details Printer having processor with instruction cache and compressed p Printer having processor with instruction cache and compressed p

1998-07-08

2000-10-03

Coles, Edward L.

Facsimile and static presentation processing

Static presentation processing

Communication

358 116, 358 117, G06F 1500

Patent

active

061280941

ABSTRACT:
A printer provides additional read/write memory for image processing by operating with stored programs in compressed form. When needed for execution, instructions of a compressed program are expanded by a decompression circuit on the fly in an instruction cache. In a preferred embodiment, the instruction cache includes dynamic random access memory (DRAM). Further, the processor for executing the expanded instructions, the decompression circuit, and the instruction cache are integrated together on the same chip. A printer having a processor for formatting incoming data in a page description language (PDL), for example, executes the instructions of the PDL interpreter program from the cache while the PDL program as a whole is stored in compressed format in off-chip ROM or received from an external computer (downloaded) into off-chip RAM.

REFERENCES:
patent: 4847902 (1989-07-01), Hampson
patent: 5450562 (1995-09-01), Rosenberg et al.
patent: 5502550 (1996-03-01), Hori et al.
patent: 5729668 (1998-03-01), Claflin et al.
patent: 5737503 (1998-04-01), Mitani
patent: 5794094 (1998-08-01), Boockholdt et al.
patent: 5959744 (1999-09-01), Kohri et al.
U.K. Search Report, Sep. 8, 1999.

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