Method of manufacturing a semiconductor device

Details Method of manufacturing a semiconductor device Method of manufacturing a semiconductor device

1990-04-25

1992-03-24

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 27, 437162, 437233, 148DIG123, 148DIG124, H01L 21265

Patent

active

050986384

ABSTRACT:
A method of manufacturing a semiconductor device forms an intrinsic base layer by doping an impurity in the emitter polysilicon electrode into the intrinsic base region of the surface of a semiconductor substrate by heat treatment through the emitter lead-out part hole self-aligned to the base lead-out electrode. Thus, beneath the insulation film of the substrate surface between the base lead-out part hole and emitter lead-out part hole, the outer marginal part of the intrinsic base layer and the inner marginal part of the extrinsic base layer overlap uniformly. Still more, since the diffusion of the impurity by heat treatment is very fast in the polysilicon emitter electrode as compared with that in the silicon substrate, an extremely shallow intrinsic base layer may be formed.

REFERENCES:
patent: 4837176 (1989-06-01), Zdebel et al.
patent: 4879252 (1989-11-01), Komatsu
"70 ps ECL Gate Si Bipolar Technology Using Borosenic-Poly Process W/Coupling-Base Implant", T. Yamaguchi et al., IEEE 1988 Custom Integrated Circuits Conference, May 16-19, 1988, Rochester, NY.
"A Novel Base-Emitter Self-Alignmanet Process for High Speed Bipolar LSIs", Y. Okita et al., IEEE 1988 Custom Integrated Circuits Conference, May 16-19, 1988, Rochester, NY.
"A High-Performance Bipolar Integrated Circuit Process", Irene V. Pecenco et al., Sep. 1982, Hewlett-Packard Journal, pp. 27-29.
Wolf et al., Silicon Processing for the VLSI ERA, vol. 1, Lattice Press, Sunset Beach, CA 1986, pp. 216-218.

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