Boots – shoes – and leggings
Patent
1989-10-23
1992-10-20
Lee, Thomas C.
Boots, shoes, and leggings
3642398, 36424341, 364251, 364252, 3649591, 364960, 3649659, 3642448, 364DIG1, 395400, G06F 1200
Patent
active
051577763
ABSTRACT:
A method and main memory system that provides a processor cache includes. Dual-port random access memory devices used for main memory, with one port providing typical random access and a second port being associated with an internal shift register that contains sequential instruction words. Improved system speed can be achieved by virtue of the shorter access time of the second port. A preferred embodiment is adapted to employ conventional video random access memory devices as constituents of a main memory system with unique control methods.
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Lee Thomas C.
Mohamed Ayni
Zenith Data Systems Corporation
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