Boots – shoes – and leggings
Patent
1983-02-14
1986-09-16
Malzahn, David H.
Boots, shoes, and leggings
364900, G06F 748, G06F 1200
Patent
active
046126287
ABSTRACT:
A floating-point unit constructed of at least two identical modules. Each module contains registers for storing floating-point data, a sign and exponent processing unit for processing the sign and exponent portions of floating-point values, and a mantissa processing unit for processing the mantissa portion. Buses allow transfer of operands from the registers to the mantissa and sign and exponent processing units and the return of the result to the registers. Interconnections between the modules and configuration logic on each module enable the modules to function as a single floating-point unit. The interconnections include connections between corresponding buses of the modules and connections between corresponding mantissa processing units. The configuration logic is responsive to position signals indicating the module's position relative to other modules in the floating-point unit and precision signals indicating the precision of the floating-point data being processed by the unit. The configuration logic enables the exponent processing unit of only the first module, and disables those of the remaining modules. The configuration logic further inhibits modules whose mantissa processing units are not required for processing a mantissa of a given precision from affecting the results produced by the remaining mantissa processor units. In modules other than the first module, the connections between corresponding buses transfer bits normally processed by the sign and exponent processor to and from the mantissa processor of an adjacent module.
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Rallapalli et al., "Chips Make Fast Math a Snap for Microprocessors" Electronics, vol. 53, No. 10, Apr. 24, 1980, pp. 153-57.
Beauchamp Robert W.
Springer George P.
Cechony Gerald
Data General Corp.
Malzahn David H.
Wall Joel
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