Method of manufacturing a FET

Metal working – Method of mechanical manufacture – Assembling or joining

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Details

29576B, 29591, 148187, 148188, 148189, 148190, H01L 21223, H01L 21225, H01L 21265, H01L 21283

Patent

active

045369437

ABSTRACT:
In a method of forming electrodes or wiring structures in a semiconductor device, metal and metal silicide are used for electrodes and lead wires, impurities are doped into the interface of a semiconductor substrate from the surface by gas diffusion or solid diffusion irrespective of the thickness, and in the case where the base material is an insulating material, the impurities are not doped into the semiconductor region side by self-alignment.

REFERENCES:
patent: 3967981 (1976-07-01), Yamazaki
patent: 4127931 (1978-12-01), Shiba
patent: 4282647 (1981-08-01), Richman
patent: 4413403 (1983-11-01), Ariizumi
patent: 4430793 (1984-02-01), Hart
patent: 4431460 (1984-02-01), Barson et al.

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