Method for improved pre-metal planarization

Details Method for improved pre-metal planarization Method for improved pre-metal planarization

1995-03-29

1996-12-17

Fourson, George

Fishing, trapping, and vermin destroying

437192, 437194, 437195, 437228, H01L 2128

Patent

active

055853080

ABSTRACT:
A method of forming an integrated circuit wherein a planarization step is been performed before the primary metal deposition step, but after deposition of the adhesion and barrier layers. Thus the adhesion and barrier layers are present on the sidewalls of contact holes, but do not underlie the whole extent of the primary metallization.

REFERENCES:
patent: 5049975 (1991-09-01), Ajika et al.
patent: 5061985 (1991-10-01), Meguro et al.
patent: 5124780 (1992-06-01), Sandhu et al.
patent: 5164330 (1992-11-01), Davis et al.
patent: 5233217 (1993-08-01), Dixit et al.
patent: 5356836 (1994-10-01), Chen et al.
patent: 5486492 (1996-01-01), Yamamoto et al.
S. Wolf "Silicon Processing for the VLSI Era, vol. 2", Lattice Press, 1990, p. 128.

Affiliated with

Also associated with

Rating

Method for improved pre-metal planarization does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for improved pre-metal planarization, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for improved pre-metal planarization will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1990929