Process for producing NPN type lateral transistors

Details Process for producing NPN type lateral transistors Process for producing NPN type lateral transistors

1985-04-08

1986-09-16

Ozaki, George T.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29580, 148187, H01L 21461

Patent

active

046113878

ABSTRACT:
The invention provides a unique VLSI dimensioned NPN type transistor and method of making the same, wherein hundreds of such transistors may be fabricated on a single chip with each transistor comprising an active region surrounded by field oxide completely isolating it from the substrate and its effects on operation. Spaced apart slots made in the substrate permit the introduction of orientation dependent etching fluid therein to at least substantially etch semi-arrays of active regions of the substrate away from the substrate except for spaced apart supports therealong. Oxidation serves to support the semi-arrays directly from the substrate or by webs of oxidation along the tops of the semi-arrays connected to the substrate. The support is necessary while orthogonal slots are provided permitting access to opposed sides of the active regions for doping n+ from each end, which n+ is driven in from both sides to provide an n+p n+ emitter-base-collector transistor active region to which electrical connections are applied using conventional techniques providing almost complete reduction of the parasitic capacitances and resistances because of the total oxide isolation of the active regions from the substrate.

REFERENCES:
patent: 4419150 (1983-12-01), Soclof
patent: 4435899 (1984-03-01), Soclof
patent: 4437226 (1984-03-01), Soclof
patent: 4485551 (1984-12-01), Soclof
patent: 4522682 (1985-06-01), Soclof

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