High frequency, high power semiconductor package

Details High frequency, high power semiconductor package High frequency, high power semiconductor package

1976-05-17

1977-05-10

Wojciechowicz, Edward J.

357 51, 357 71, 357 68, 357 74, H01L 2702, H01L 2302, H01L 2348

Patent

active

040231984

ABSTRACT:
A semiconductor packaging configuration is described in which a heat sink is bonded to a semiconductor chip or die and a conductor is bonded to the die and a metalized ceramic insulating body for achieving optimum heat transfer. Additionally, electrical matching and/or reduction of parasitic elements is achieved by a low pass matching filter comprising the capacitance of the chip or die, the capacitance of the metalized ceramic body and the inductance of the electrical conductor. This provides a significant improvement in power handling capabilities of a semiconductor chip or die operating at elevated temperatures and gigahertz frequencies. The electrical conductor geometry and its bonds provide a reduction of the thermal resistance of the package and also provides the inductance which forms part of the low pass matching filter.

REFERENCES:
patent: 3626259 (1971-12-01), Garboushian et al.
patent: 3701049 (1972-10-01), Van Iperen et al.

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