Method of manufacturing semiconductor device

Fishing – trapping – and vermin destroying

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

437 22, 437126, 437130, 437133, 437909, 148DIG10, 148DIG72, H01L 2120, H01L 21331

Patent

active

050377698

ABSTRACT:
A semiconductor device of a multilayer structure comprising semiconductor materials of different properties manufactured by using at least a step of epitaxially forming a semiconductor material layer on a substrate and a passivation film layer thereover, a step of introducing impurities into specific portions of the epitaxially formed semiconductor material layer and a step of removing the passivation film layer formed directly above the epitaxially formed semiconductor material layer within an epitaxial device and then applying epitaxial growing. Impurities introduced additionally to specific portions of the layer inside are substantially eliminated at the boundary adjacent the layer above the region introduced with impurities and the properties of the thus-produced semiconductors vary abruptly at the boundary between the layer in which the impurities are introduced and the layer thereabove. The material used for the passivation film layer comprises one that can be epitaxially formed and easily removed at a temperature and in a atmosphere under which the epitaxially formed layer below the passivation film are not decomposed or evaporized.

REFERENCES:
patent: 4032951 (1977-06-01), De Winter et al.
patent: 4055443 (1977-10-01), Akimov et al.
patent: 4237471 (1980-12-01), Pommerpenig
patent: 4593457 (1986-06-01), Birritella
patent: 4635343 (1987-01-01), Kuroda
patent: 4651410 (1987-03-01), Feygenson
patent: 4662058 (1987-05-01), Cirillo, Jr. et
Asbeck et al., "(Ga,Al)As/GaAs Bipolar Transistors for Digital Integrated Circuits," Conference: International Electron Devices Meeting, Wash., D.C., (7-9 Dec. 1981), pp. 629-632.
Kroemer, "Heterostructure Bipolar Transistors and Integrated Circuits," Proceedings of the IEEE, vol. 70, No. 1, Jan. 82, pp. 13-25.
Asbeck et al., "GaAs/(Ga,Al) As Heterojunction Bipolar Transistors with Buried Oxygen-Implanted Isolation Layers," IEEE Electron Device Letters, vol. EDL-5, No. 8, Aug. 1984, pp. 310-312.
Shang, "In SbAs Infrared Sensor," IBM Technical Disclosure Bulletin, vol. 14, No. 11, Apr. 1972, p. 3289.
"Heterostructure Bipolar Transistors and Integrated Circuits", Proceedings of the IEEE, vol. 70, No. 1, Jan. 1982, Herbert Kroemer, pp. 13-25.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of manufacturing semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1986782

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.