Device for increasing the length of a logic computer address

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G06F 700, G06F 900, G06F 934

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active

043618685

ABSTRACT:
A data processing machine having a device for extending the length of the logic address to (M+N) bits, so that 2.sup.M+N different logic addresses can be formed and become available to the programmer. The original data structure of a computer having a word length of only N bits is then maintained. Programs written for the original machine can be executed without modification. A register bank of a data processing machine having its extension has a first section having a width of N bits which forms the least-significant side or tail, and a second section which has a width of M bits and which forms the more significant side or head. The first section is used in all instructions which utilize an operand from a register or which store an operand in a register, in the same manner as in the computer without the extension. The second section is used only if reference is made to the memory while using a register as a base register or as an index register; or if a special, new instruction is issued in order to load or store the content of the register thus addressed. The M additional address bits in the extension of the register provide the bits of higher significance in a physical or virtual address. Or they can also provide a segment number which is used in a subsequent conversion of the segmented virtual address into a physical address. In the segmented case, it is not necessary to apply a carry output signal from the section having a width of N bits to the section of the register having a width of M bits.

REFERENCES:
patent: 3614746 (1971-10-01), Klinkhamer
patent: 3725874 (1973-04-01), Van Heel
patent: 3735355 (1973-05-01), Balogh et al.
patent: 4044334 (1977-08-01), Bachman et al.
patent: 4084227 (1978-04-01), Bennett et al.
patent: 4096573 (1978-06-01), Heller et al.
patent: 4128875 (1978-12-01), Thurber et al.

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