Patent
1995-12-04
1998-05-26
Harvey, Jack B.
395729, G06F 13362
Patent
active
057581053
ABSTRACT:
An arbiter which allows a normal arbitration algorithm to be implemented for standard I/O devices, and an isochronous arbitration algorithm to be run for isochronous devices. Further, the isochronous devices can participate in the normal arbitration scheme when operating as a standard I/O device. A host bridge interconnects a system bus with an I/O bus, such as the PCI bus. The host bridge includes an arbiter with a normal arbitration algorithm, and, an isochronous arbitration algorithm implemented in either logic circuitry or software. Each I/O device (both standard devices and isochronous devices) connected to the I/O bus has a bus request line which transmits a request for control of the I/O bus to the arbiter. Depending on the state of the bus request control signal, the arbiter can determine which arbitration algorithm is to be utilized. For example, a standard device will drive the bus request signal active and hold it in its active state to indicate a standard bus request. In this case, the arbiter recognizes the standard request and runs a standard arbitration cycle. However, an isochronous device will pulse the bus request line to communicate an isochronous bus request and cause the arbiter to run an isochronous arbitration cycle. It can be seen that an isochronous device can operate as a standard device by activating its bus request signal and then maintaining it in the active state.
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Kelley Richard Allen
Neal Danny Marvin
Harvey Jack B.
International Business Machines - Corporation
Lefkowitz Sumati
McBurney Mark E.
Tyson Thomas E.
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