Semiconductor device comprising high-speed and high-current tran

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357 43, 357 42, H01L 2972, H01L 2702

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active

051517655

ABSTRACT:
A semiconductor device having a submicron miniaturization level structure comprises a first high-current bipolar transistor having a first wide emitter width and a second high-speed bipolar transistor having a narrow emitter width relatively to the first emitter width, which transistors are formed in a second common semiconductor substrate. According to a first embodiment, the base region of the first transistor is thicker than that of the second transistor, and thus a suitable h.sub.Fe balance is maintained; and according to another embodiment, the first, base region of the first transistor has a higher impurity concentration than the second base region of the second transistor and has the same depth as that of the second base region, so that a suitable h.sub.FE balance is maintained.

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patent: 4879584 (1989-11-01), Takagi et al.
patent: 4957874 (1990-09-01), Soejima
"A High-Speed Bipolar LSI Process Using Self-Aligned Doubled Diffusion Polysilicon Technology", Kikuchi et al, IEEE IEDM-86, 1986, pp. 420-423.
IBM Technical Disclosure Bulletin, vol. 15 #2, Jul. 1972.
M. Nakamae: "Recent Process and Future Prospe for VLSI . . . ", IEEE BCIM, 1987, pp. 5-6.
T. C. Chen, et al: "Reliability Analysis of Self-Aligned Bipolar . .. ", IEEE IEDM, 1986, pp. 650-653.

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