Fermi threshold silicon-on-insulator field effect transistor

Details Fermi threshold silicon-on-insulator field effect transistor Fermi threshold silicon-on-insulator field effect transistor

1991-01-25

1992-09-29

Hille, Rolf

357 4, 357 237, 357 2312, 357 2314, H01L 2978

Patent

active

051517590

ABSTRACT:
A Silicon-on-Insulator (SOI) field effect transistor (FET) operates in the enhancement mode without requiring inversion by setting the device's threshold voltage to twice the Fermi potential of the thin semiconductor layer in which the transistor is fabricated. The FET, referred to as a Fermi Threshold SOI FET or Fermi SOI FET, has a threshold voltage which is independent of oxide thickness, channel length, drain voltage and substrate channel doping. The vertical electric field in the substrate channel becomes zero, thereby maximizing carrier mobility, and minimizing hot electron effects. The thin silicon layer in which the devices are formed is sufficiently thick such that the channel is not fully depleted at pinch-off. A high speed device, substantially independent of device dimensions is thereby provided, which may be manufactured using relaxed groundrules, to provide low cost, high yield devices.
Temperature dependence of threshold voltage may also be eliminated by providing a semiconductor gate contact which neutralizes the effect of substrate contact potential. Multiple gate devices may be provided. An accelerator gate, adjacent the drain, may further improve performance.

REFERENCES:
patent: Re32800 (1988-12-01), Han et al.
patent: 3872491 (1975-03-01), Hanson et al.
patent: 4042945 (1977-08-01), Lin et al.
patent: 4108686 (1978-08-01), Jacobus, Jr.
patent: 4274105 (1981-06-01), Crowder et al.
patent: 4697198 (1987-09-01), Komori et al.
patent: 4737471 (1988-04-01), Shirato et al.
patent: 4831422 (1989-05-01), Ohno
patent: 4841346 (1989-06-01), Noguchi
patent: 4899202 (1990-02-01), Blake et al.
patent: 4907048 (1990-03-01), Huang
patent: 4928156 (1990-05-01), Alvia et al.
patent: 4984043 (1991-01-01), Vinal
patent: 4990974 (1991-02-01), Vinal
patent: 4994872 (1991-02-01), Nishizawa et al.
IEEE Transactions on Electron Devices, vol. ED-33, No. 3, Mar. 1986, "A New Half-Micrometer p-Channel MOSFET with Efficient Punchthrough Stops" by Odanaka et al, pp. 317-321.
1981 Symposium on VLSI Technology, Hawaii (Sep., 1981), Dig. Tech. Papers, pp. 22-23, "Submicron MOSFET Structure for Minimizing Channel Hot-Electron Injection" by Takeda et al.
International Search Report for International Application No. PCT/US 9001158.
Characteristics of P-Channel MOS Field Effect Transistors With Ion-Implanted Channels, Hswe, M. et al., Solid-State Electronics, vol. 15, pp. 1237-1243, 1972.
The Junction MOS (JMOS) Transistor--A High Speed Transistor for VLSI, Sun, E. et al., IEEE, pp. 791-794, 1980.
Optimization of Sub-Micron P-Channel FET Structure, Chiang, S. et al., IEEE, pp. 534-535, 1983.
Gate Material Work Function Considerations for 0.5 Micron CMOS, Hillenius, S. J. et al., IEEE, pp. 147-150, 1985.
A Normally-Off Type Buried Channel MOSFET for VLSI Circuits; By K. Nishiuchi et al. (IEDM Technical Digest, 1979, pp. 26-29).
Ultra-High Speed CMOS Circuits in Thin SIMOX Films, A. Kamgar et al., IEDM vol. 89, pp. 829-832, 1989.
Fabrication of CMOS on Ultrathin SOI Obtained by Epitaxial Lateral Overgrowth and Chemical-Mechanical Polishing, G. Shahidi, IEDM vol. 90, pp. 587-590, 1990.

Affiliated with

Also associated with

Rating

Fermi threshold silicon-on-insulator field effect transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fermi threshold silicon-on-insulator field effect transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fermi threshold silicon-on-insulator field effect transistor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1972285