Relational algebra engine

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G06F 724, G06F 702

Patent

active

045148260

ABSTRACT:
Disclosed is a relational algebra engine which has a sort engine, a merge engine, a control processor and a common bus. The sort engine has a plurality of first processing elements which are connected in series. Each first processing element includes first and second buffer memories, a first memory which has a FIFO function, and a first processor which sorts input data elements in accordance with a predetermined rule by using the first and second buffer memories and the first memory which has the FIFO function. The first and second buffer memories and the first memory which has the FIFO function are disposed in parallel. The merge engine has two second processing elements which are disposed in parallel. Each second processing element includes a third buffer memory, a second memory which has the FIFO function, a second processor which merges the data elements sorted in the sort engine by using the third buffer memory and the second memory which has the FIFO function and an output buffer memory which stores the data elements merged in the second processor. The third buffer memory is disposed parallel to the second memory which has the FIFO function.

REFERENCES:
patent: 3713107 (1973-01-01), Barsamian
patent: 3931612 (1976-01-01), Stevens et al.
patent: 4030077 (1977-06-01), Florence et al.
patent: 4078260 (1978-03-01), Chen et al.
patent: 4209845 (1980-06-01), Berger et al.
patent: 4210961 (1980-07-01), Whitlow et al.
IBM J. Res. Develop., vol. 22, No. 5, Sep. 1978, pp. 509-517, Algorithm and Hardware for a Merge Sort Using Multiple Processors, by S. Todd.

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