Method of forming insulated gate effect transistor in a substrat

Fishing – trapping – and vermin destroying

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437 35, 437 38, 437203, H01L 21265

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054647800

ABSTRACT:
A field effect transistor is formed on a side surface of a rectangular parallelepiped depression formed in the upper surface of a single crystalline substrate. The orientation of the side surface is substantially selected in the (100) plane or an equivalent plane of the crystalline structure of the substrate. A gate electrode is formed on the side surface with a gate insulating film therebetween. Source and Drain regions are formed in the bottom of the depression and the surface of the substrate adjacent to the depression by ion implantation with the gate electrode as a mask.

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patent: 5017504 (1991-05-01), Nishimura
patent: 5027173 (1991-06-01), Satoh
patent: 5032882 (1991-07-01), Okumura et al.
patent: 5047359 (1991-09-01), Nagatomo
patent: 5053842 (1991-10-01), Kojima
patent: 5086010 (1992-02-01), Kimura

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