Stacked capacitator memory cell and method of fabrication

Semiconductor device manufacturing: process – Making passive device – Trench capacitor

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438386, H01L 2120

Patent

active

061366609

ABSTRACT:
A memory cell includes a field effect transistor and a stacked capacitor. The stacked capacitor has one plate formed by a platinum layer over the side walls of a portion of a dielectric layer that overlies a conductive layer that makes contact to a conductive plug connected to the storage node of the cell. The capacitor dielectric overlies the sidewalls and top of the dielectric layer portion and the other plate of the capacitor is formed by a platinum layer over the capacitor dielectric.

REFERENCES:
patent: 5607874 (1997-03-01), Wang et al.
patent: 5672534 (1997-09-01), Huang
patent: 5702989 (1997-12-01), Wang et al.
patent: 5714401 (1998-02-01), Kim et al.
patent: 5716884 (1998-02-01), Hsue et al.
patent: 5721152 (1998-02-01), Jenq et al.
patent: 5750431 (1998-05-01), Wu
patent: 5879957 (1999-03-01), Joo
patent: 5940676 (1999-08-01), Fazan et al.

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