Forming a split-level CMOS device

Details Forming a split-level CMOS device Forming a split-level CMOS device

1987-12-30

1988-10-11

Ozaki, George T.

Fishing, trapping, and vermin destroying

437174, H01L 2136

Patent

active

047771470

ABSTRACT:
A method for forming CMOS device wherein the NMOS devices are bulk devices and the PMOS devices are SOI devices. The PMOS devices are formed with their channel regions in a silicon-on-insulator layer, preferably a laterally recrystallized annealed-polysilicon layer over a silicon dioxide layer.

REFERENCES:
patent: 4333099 (1982-06-01), Tanguay et al.
patent: 4472729 (1984-09-01), Shibata et al.
patent: 4637127 (1987-01-01), Kuragi et al.

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