Global operation coordination method and circuit

Details Global operation coordination method and circuit Global operation coordination method and circuit

1981-12-14

1984-10-16

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1300

Patent

active

044778716

ABSTRACT:
A memory management unit of use in a memory management system. The memory management unit selectively maps a logical address to a respective physical address in accordance with a selected one of a plurality of segment descriptors, each of which defines a logical-to-physical address mapping and a range of address spaces for which such mapping is valid. The mapping is achieved using an improved associative memory circuit. Means are provided to detect mapping conflicts between new segment descriptors and segment descriptors already stored, and to prevent the storage of such conflicting segment descriptors. A method and circuit are provided to coordinate the parallel operation of a plurality of the memory management units or the like.

REFERENCES:
patent: 3480914 (1969-11-01), Schlaeppi
patent: 4040028 (1977-08-01), Pauker
patent: 4153934 (1979-05-01), Sato
patent: 4223380 (1980-09-01), Antonaccio et al.
patent: 4236208 (1980-11-01), O'Keefe et al.
patent: 4363094 (1982-12-01), Kaul et al.
patent: 4365295 (1982-12-01), Katzman et al.
patent: 4384322 (1983-05-01), Bruce et al.
patent: 4384327 (1983-05-01), Conwag et al.
patent: 4433376 (1984-02-01), Lombardo, Jr. et al.

Affiliated with

No affiliations

Also associated with

Rating

Global operation coordination method and circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Global operation coordination method and circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Global operation coordination method and circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1948291